In a variety of integrated circuits, high voltage signals are used for various purposes. For instance, in non-volatile memory circuits, high voltage signals are used to erase and write data to the memory cells of the non-volatile memory. After the high voltage is applied within the memory device, the high voltage signal should be controllably discharged so as to reduce possible electrical interactions with any other portions of the circuit or device, such as through electrical coupling or transients or the like.
A high voltage signal, in this context, includes voltages which are outside of the normal power supply range of the integrated circuit. For example, in a circuit which operates on logic levels of zero to +5 volts, a high voltage signal would include a negative voltage reference of −5 volts, for example, referred to herein as the VNEG signal. While not shown in these figures, it is assumed that the high voltage signal VNEG is generated by a high voltage generating circuit capable of creating a high voltage signal such as −5 volts.
Referring now to FIG. 1, a circuit 10 for discharging a high voltage VNEG signal is illustrated. As shown in FIG. 1, the circuit includes logic 12, a plurality of high voltage switches 14a–c, discharge transistors 16, 18, and a clamp transistor 20 under the control of the logic 12.
The high voltage line VNEG is coupled to the drain of the discharge transistor 16, the drain of the extra discharge transistor 18, and the drain of the clamp transistor 20 shown in FIG. 1. The source of each of these transistors is coupled with ground, and the gate of each of the these transistors is coupled with the high voltage output for each high voltage switch 14. As can be seen in FIG. 1, a plurality of high voltage switches 14a,b,c are provided to drive the discharge and clamp transistors.
The two high voltage switches 14a,b are shown in block form and the third high voltage switch 14c is shown as a level shifter, in one example. Each high voltage switch has an input from the logic which controls the output of the high voltage switch. For instance, the third high voltage switch 14c provides an output which is the logical complement (shifted to a higher voltage level) of the signal the logic provides at the input of the high voltage switch. This output is coupled with the gate of the discharge transistor shown in FIG. 1.
In one example of the operation of the circuit of FIG. 1, initially, both discharge transistors 16, 18 are off so that the VNEG high voltage signal is allowed to go below ground to its high voltage level, for example, −5 volts. Once the high voltage signal VNEG has reached its high voltage level and the source (not shown) which created the high voltage signal VNEG turns off, the logic can direct the high voltage switch to activate the discharge transistor 16 or the extra discharge transistor 18. The discharge transistor 16 and the extra discharge transistor 18 provide a discharge path for the high voltage VNEG signal.
However, the discharge transistor 16 and the extra discharge transistor 18 may be subjected to “snapback” which is an abrupt change in the conducting characteristics of the discharge transistors due to high substrate current created at the drain side of the transistor under high drain to source biases. This high substrate or base current turns on the lateral drain to source bipolar parasitic device.
After the high voltage VNEG signal discharges to ground, the logic 12 enables the clamp transistor 20 to hold the high voltage signal VNEG at the ground potential so that any circuits which are coupled with the VNEG signal can properly operate during times at which the VNEG signal is not at its high voltage level of −5 volts, for example.
The implementation of FIG. 1 uses logic 12 to control the clamp transistor 20. In an integrated circuit which includes a large number of high voltage signal lines, such an implementation as in FIG. 1 may require a large number of high voltage switches and corresponding logic to control the same. Further, if multiple discharge paths are used in an integrated circuit, the implementation in FIG. 1 may utilize multiple high voltage switches and a discharge transistor for each discharge path.
As recognized by the present inventors, what is needed is a circuit for discharging a high voltage signal which includes a clamp transistor that automatically turns on or off without requiring additional logic or without utilizing high voltage switches.
It is against this background that various embodiments of the present invention were developed.